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2big_nas [2013/06/12 17:32] – hanno | 2big_nas [2013/07/04 04:24] – hanno | ||
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^Address ^Part ^Description ^ | ^Address ^Part ^Description ^ | ||
- | |0x3E|?| | | + | |0x3E|G762|Fan controller| |
|0x50 - 0x53|HT24LC08|1KB EEPROM| | |0x50 - 0x53|HT24LC08|1KB EEPROM| | ||
- | |0x64|?| | | + | |0x64|Debug Port/Serial ROM ?|| |
|0x68|DS1337|RTC| | |0x68|DS1337|RTC| | ||
- | === CPU Address Map === | + | === EEPROM Data === |
- | RAM: 0x00000000 - 0x0FFFFFFF (256MB) | + | ^Offset ^Size ^Value |
- | + | |0x000|1|0x00| | | |
- | === EEPROM Address Map === | + | |0x001|1|0x04|EEPROM version| |
- | + | |0x002|6|unique|MAC address; big endian| | |
- | ^Offset ^Size ^Description ^ | + | |0x008|6 ?|0xFF| | |
- | |0x000|2 ?|0x00 0x04| | + | |0x00E|1 ?|0x01| | |
- | |0x002|6|MAC | + | |0x00F|74 ?|ASCII|Text| |
- | |0x008|6 ?|all 0xFF| | + | |0x0C5|1 ?|0x01|hmmm...| |
- | |0x00E|1 ?|0x01| | + | |Remainder||0xFF| |
- | |0x00F|74 ? | + | |
- | |0x0C5|1 ?|0x01| | + | |
< | < | ||
Line 436: | Line 434: | ||
008000e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | 008000e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
008000f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | 008000f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
- | 00800100: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | : |
- | 00800110: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800120: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800130: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800140: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800150: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800160: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800170: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800180: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800190: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008001a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008001b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008001c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008001d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008001e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008001f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800200: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800210: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800220: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800230: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800240: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800250: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800260: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800270: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800280: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800290: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008002a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008002b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008002c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008002d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008002e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008002f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800300: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800310: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800320: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800330: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800340: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800350: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800360: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800370: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800380: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 00800390: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008003a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
- | 008003b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | + | |
008003c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | 008003c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
008003d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | 008003d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
Line 486: | Line 443: | ||
</ | </ | ||
+ | ==== Functional Specs ==== | ||
+ | |||
+ | === CPU Address Decoding === | ||
+ | Sheeva CPU core has 13 address windows: | ||
+ | * 4x for CPU access to DRAM CS | ||
+ | * 1x for CPU access to internal registers | ||
+ | * 8x configurable for CPU access to remaining chip resources | ||
+ | == DRAM Windows == | ||
+ | * 8-bit BASE & SIZE registers | ||
+ | * BASE corresponds to address bits [31:24] | ||
+ | * Min. SIZE (0x01) = 16MB; max. SIZE (0xFF) = 4GB | ||
+ | * SIZE is a mask; only 8 legal values (0x01, 0x03, 0x07, 0x0F, etc.) | ||
+ | == Register Window == | ||
+ | * Fixed SIZE of 1MB | ||
+ | * BASE register | ||
+ | == Configurable Windows == | ||
+ | * 16-bit BASE & SIZE registers | ||
+ | * BASE corresponds to address bits [31:16] | ||
+ | * Min. SIZE (0x0001) = 64KB; max. SIZE (0xFFFF) = 4GB | ||
+ | * SIZE is a mask; 16 legal values | ||
+ | === SATA Address Decoding === | ||
+ | * 4x address windows | ||
+ | * SDRAM and PCIe interface access | ||
+ | === GbE Address Decoding === | ||
+ | * 6x address windows | ||
+ | * SDRAM interface access only | ||
+ | === USB Address Decoding === | ||
+ | * 4x address windows per USB port | ||
+ | * SDRAM interface access only | ||
+ | === SDIO Address Decoding === | ||
+ | * 4x programmable address windows | ||
+ | * SDRAM and PCIe interface access | ||
+ | === Default Address Map (p.41) === | ||
+ | ^Desc ^Size ^Base ^End ^Num ^State ^ | ||
+ | |SDRAM CS0|256MB|0x0000 0000|0x0FFF FFFF| | | | ||
+ | |SDRAM CS1|256MB|0x1000 0000|0x1FFF FFFF| | | | ||
+ | |SDRAM CS2|256MB|0x2000 0000|0x2FFF FFFF| | | | ||
+ | |SDRAM CS3|256MB|0x3000 0000|0x3FFF FFFF| | | | ||
+ | |reserved| |0x4000 0000|0x7FFF FFFF| | | | ||
+ | |PCIe Memory|512MB|0x8000 0000|0x9FFF FFFF| | | | ||
+ | |PCIe-1 Memory|512MB|0xA000 0000|0xBFFF FFFF|(reserved)|6282 guess| | ||
+ | |PCIe I/ | ||
+ | |PCIe-1 I/ | ||
+ | |reserved| |0xC002 0000|0xC800 FFFF| | | | ||
+ | |Security SRAM|64KB (2KB)|0xC801 0000|0xC801 FFFF| | | | ||
+ | |reserved| |0xC802 0000|0xCFFF FFFF| | | | ||
+ | |Internal Registers|1MB|0xD000 0000|0xD00F FFFF| | | | ||
+ | |reserved| |0xD010 0000|0xD7FF FFFF| | | | ||
+ | |NAND Flash|128MB|0xD800 0000|0xDFFF FFFF| | | | ||
+ | |reserved| |0xE000 0000|0xE7FF FFFF| | | | ||
+ | |SPI Flash|128MB|0xE800 0000|0xEFFF FFFF| | | | ||
+ | |BootROM|128MB|0xF000 0000|0xF7FF FFFF| | | | ||
+ | |Boot device|128MB|0xF800 0000|0xFFFF FFFF| | | | ||
+ | === LaCie Configured Address Map (mvSysHwConfig.h) === | ||
+ | ^Desc ^Size ^Base ^Notes ^Num ^State ^ | ||
+ | |SDRAM CS0|256MB|0x00000000| | |dis| | ||
+ | |SDRAM CS1|256MB|0x10000000| | |dis| | ||
+ | |SDRAM CS2|256MB|0x20000000| | |dis| | ||
+ | |SDRAM CS3|256MB|0x30000000| | |dis| | ||
+ | |PEX0 MEM|128M|0x90000000| |0|en| | ||
+ | |PEX1 MEM|128M|0x98000000|6282 only|1|en| | ||
+ | |PEX0 I/ | ||
+ | |INTER REGS|1M? | ||
+ | |PEX1 I/ | ||
+ | |DEVICE CS2|1M|0xF4000000|Boot ROM|9|dis| | ||
+ | |DEVICE CS1|16M|0xF8000000|SPI|5|en| | ||
+ | |DEVICE CS0|8M|0xF9000000|NAND|4|en| | ||
+ | |CRYPT ENG|64K|0xFB000000| |7|en| | ||
+ | |DEVICE CS3|16M|0xFF000000|Boot device|0xA|dis| | ||
+ | |||
+ | |||
+ | Bloody hell... | ||
+ | * # | ||
+ | * #define INTER_REGS_BASE | ||
+ | * #define NAND_FLASH_BASE | ||
+ | * #define BOOTER_PAGE_NUM | ||
+ | * #define BOOTER_BASE | ||
+ | * #define BOOTER_END | ||
+ | * #define NAND_CMD_PORT | ||
+ | * #define NAND_ADDR_PORT | ||
+ | * #define NUM_BLOCKS | ||
+ | * #define PAGES_PER_BLOCK | ||
+ | * #define PAGE_SIZE | ||
+ | * #define SPARE_SIZE | ||
+ | * #define CFG_NAND_PAGE_SIZE | ||
+ | * #define CFG_NAND_BLOCK_SIZE | ||
+ | * #define CFG_NAND_PAGE_COUNT | ||
+ | * #define CFG_NAND_BAD_BLOCK_POS | ||
+ | * #define CFG_NAND_U_BOOT_OFFS | ||
+ | * #define CFG_NAND_U_BOOT_SIZE | ||
+ | * #define CFG_NAND_U_BOOT_DST | ||
+ | * #define CFG_NAND_U_BOOT_START | ||
+ | |||
+ | = Trying to find ENV in NAND = | ||
+ | |||
+ | I think it uses /* Use the new NAND code. */ in mv_kw.h | ||
+ | And it also #undef CFG_ENV_IS_IN_FLASH which is interesting... | ||
+ | Think only need ENV_SIZE and ENV_OFFSET when in NAND | ||
+ | |||
+ | #define CFG_ENV_OFFSET 0xA0000 (640 << 10) /* environment starts here */ | ||
+ | #define CFG_ENV_SECT_SIZE 0x20000 (128 << 10) /* environment take 1 block */ | ||
+ | #define CFG_ENV_SIZE 0x20000 (CFG_ENV_SECT_SIZE) / | ||
+ | #define CFG_NBOOT_BASE 0 | ||
+ | #define CFG_NBOOT_LEN 0x01000 (4 << 10) /* Reserved 4KB for boot strap */ | ||
+ | # | ||
+ | #define CFG_MONITOR_BASE 0 | ||
+ | #define CFG_MONITOR_IMAGE_OFFSET 0 /* offset of the monitor from the u-boot image */ | ||
+ | #define CFG_MONITOR_IMAGE_DST 0x60000? | ||
+ | #define CFG_ENV_ADDR | ||
+ | ./ |